# HDL1013: All clocks should be generated within a unique clock management module

## Summary

```{raw} html
<div class="coding-quality-issue-table"><div class="coding-quality-issue-toolbar"><p>Count: <strong class="coding-quality-visible">1</strong></p><button type="button" class="coding-quality-clear-filters">Clear filters</button></div><table class="docutils coding-quality-issues coding-quality-issue-list"><thead><tr class="coding-quality-headers"><th scope="col">Reliability</th><th scope="col">Security</th><th scope="col">Maintainability</th><th scope="col">Code attribute</th><th scope="col">Effort to fix</th><th scope="col">Tags</th></tr><tr class="coding-quality-filters"><th><input type="search" placeholder="Filter" aria-label="Filter Reliability"></th><th><input type="search" placeholder="Filter" aria-label="Filter Security"></th><th><input type="search" placeholder="Filter" aria-label="Filter Maintainability"></th><th><input type="search" placeholder="Filter" aria-label="Filter Code attribute"></th><th><input type="search" placeholder="Filter" aria-label="Filter Effort to fix"></th><th><input type="search" placeholder="Filter" aria-label="Filter Tags"></th></tr></thead><tbody><tr><td>MEDIUM</td><td>-</td><td>HIGH</td><td>Adaptability &#124; Modular</td><td>2h</td><td>synthesis, bug-finder, cnes, clock, cnes-std-04400, linty-ultra</td></tr></tbody></table></div>
```

## Description

```{raw} html
<p>
  A dedicated clock management module brings a lot in terms of reuse and portability. Because all vendor-specific
  clocking elements such as PLLs, clock multiplexers and clock buffers are generated within the same module, it is
  easier to replace this module to target other FPGAs.
</p>
```

## Parameters

No parameters.

```{raw} html

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}
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}

a.coding-quality-rule-link,
.rst-content a.coding-quality-rule-link,
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}
a.coding-quality-rule-link:hover,
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}

</style>
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```