```{raw} html ``` # 6d5aa318-95f7-4936-9fee-3fa005704127 ## Summary ```{raw} html
| Rule | Message | Location | Effort | Reliability | Security | Maintainability |
|---|---|---|---|---|---|---|
| HDL1001 | Review clock domain crossing between 'u2_ddr.data_write2' (target) and 'clk_reg' (origin) | 0min | HIGH | - | - |