# VERILOG096: Empty ports should be removed from non-ANSI port lists ## Summary ```{raw} html

Count: 1

ReliabilitySecurityMaintainabilityCode attributeEffort to fixTags
HIGH--Intentionality | Logical5minsynthesis, vscode, linter, simulation
``` ## Description ```{raw} html

Noncompliant code example

module fly(a,,b);
  input a;
  output b;
  ...
endmodule

Compliant solution

module fly(a, b);
  input a;
  output b;
  ...
endmodule

An empty port in a non-ANSI module/program/interface declaration is likely not intended and should be removed.

``` ## Parameters No parameters. ```{raw} html ```