# VERILOG097: Repeated ports should be removed from non-ANSI port lists ## Summary ```{raw} html

Count: 1

ReliabilitySecurityMaintainabilityCode attributeEffort to fixTags
HIGH--Intentionality | Logical5minsynthesis, vscode, linter, simulation
``` ## Description ```{raw} html

A repeated port in a non-ANSI module/program/interface declaration is likely not intended and should be removed.

Noncompliant code example

module fly(a, b, a);
  ...
endmodule

Compliant solution

module fly(a, b, c);
  ...
endmodule
``` ## Parameters No parameters. ```{raw} html ```