# VERILOG2114: "always_comb" or "always_ff" or "always_latch" should be used instead of "always" ## Summary ```{raw} html

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ReliabilitySecurityMaintainabilityCode attributeEffort to fixTags
--MEDIUMConsistency | Conventional10minsynthesis, vscode, lowrisc, simulation, linter, deprecated
``` ## Description ```{raw} html

SystemVerilog always_comb or always_ff or always_latch should be used instead of Verilog always.

Noncompliant code example

module top;
  logic a, b, c;
  always @(*) begin
    c = a + b;
  end
endmodule

Compliant solution

module top;
  logic a, b, c;
  always_comb begin
    c = a + b;
  end
endmodule

Articles & blog posts

``` ## Parameters No parameters. ```{raw} html ```