# VHDL235: Signal assignments should not contain multiple waveforms ## Summary ```{raw} html
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| HIGH | - | - | Intentionality | Logical | 10min | synthesis, do254, vscode, linter, do254-ss5 |
Multiple waveforms are not synthesizable. Only the first waveform is taken into account for synthesis leading to a mismatch between synthesis and simulation. Thus, multiple waveforms should not be used in synthesizable code.
a <= '1' AFTER clk, '0' AFTER 4 * clk_prd;
a <= '0' AFTER 4 * clk_prd;``` ## Parameters No parameters. ```{raw} html ```