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# Component - uart ## Summary | Name | Location | Description | | --- | --- | --- | |uart|mlite_pack.vhd#395|| ## Generics Count: 1 | Name | Type | Default value | Description | | --- | --- | --- | --- | |log_file|string|"UNUSED"|| ## Ports Count: 10 | Name | Mode | Type | Description | | --- | --- | --- | --- | |clk|in|std_logic|| |reset|in|std_logic|| |enable_read|in|std_logic|| |enable_write|in|std_logic|| |data_in|in|std_logic_vector ( 7 downto 0 )|| |data_out|out|std_logic_vector ( 7 downto 0 )|| |uart_read|in|std_logic|| |uart_write|out|std_logic|| |busy_write|out|std_logic|| |data_avail|out|std_logic||
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