```{raw} html ``` # 18452de3-d74e-4098-93dc-5d252a7c8f71 ## Summary ```{raw} html

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RuleMessageLocationEffortReliabilitySecurityMaintainability
VHDL026Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.mlite_pack.vhd#16820minHIGH--
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