```{raw} html ``` # 478378dc-3ef2-4077-b71d-2b7648a6249e ## Summary ```{raw} html

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RuleMessageLocationEffortReliabilitySecurityMaintainability
VHDL026Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.mlite_pack.vhd#17120minHIGH--
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