```{raw} html ``` # 62f92b04-bce7-425e-9dea-9974a241f1f6 ## Summary ```{raw} html
| Rule | Message | Location | Effort | Reliability | Security | Maintainability |
|---|---|---|---|---|---|---|
| VHDL156 | Align component and related entity port names. Ports only defined in entity: no_ddr_start, no_ddr_stop. | 5min | - | - | MEDIUM |