```{raw} html ``` # 73a3501a-40b2-4dfd-ada8-6aa0b309772b ## Summary ```{raw} html

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RuleMessageLocationEffortReliabilitySecurityMaintainability
VHDL026Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.mlite_pack.vhd#17320minHIGH--
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