```{raw} html ``` # 8ace394b-6afd-4738-95bd-2f4e594ee8e5 ## Summary ```{raw} html

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RuleMessageLocationEffortReliabilitySecurityMaintainability
VHDL026Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.mlite_pack.vhd#17920minHIGH--
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