```{raw} html ``` # f4c29ce3-84ad-45c0-b76f-fc58b8374bb4 ## Summary ```{raw} html
| Rule | Message | Location | Effort | Reliability | Security | Maintainability |
|---|---|---|---|---|---|---|
| VHDL026 | Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types. | 20min | HIGH | - | - |