HDL1050: Livelock FSM states should be reviewed
Summary
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| HIGH | - | - | Intentionality | Logical | 20min | synthesis, bug-finder, fsm, linty-ultra |
Description
This rule detects finite state machines (FSM) defining livelock states. Livelock states are a closed set of two or more states: once the machine enters any state in that set, every possible next-state transition stays inside the same set. The FSM keeps changing state (so it is not “stuck” in one place), but it can never leave the set. The machine is busy, but it is making no useful progress toward the rest of the design.
Note that this rule is only checked for FSM that define a reset/initial state.
Livelock states are a sign of a design error, and they can lead to unexpected behavior in the circuit.
Parameters
No parameters.