9f5a77a9-9490-4ad0-aa7b-7d1ff4bd5cf2
Summary
| Rule | Message | Location | Effort | Reliability | Security | Maintainability |
|---|---|---|---|---|---|---|
| VHDL1052 | Check if every non-synthesized if/elsif/else generate block can be reached with different configurations. If not, remove them. | 20min | - | - | MEDIUM |