edb895c1-d8d2-4c1c-8f69-52cff821ae2b

Summary

Count: 1

RuleMessageLocationEffortReliabilitySecurityMaintainability
HDL1008'SD_DQ(15:0)' output port is unregistered. Update design to remove combinational elements from this output signal path.plasma_3e.vhd#3930minHIGH--