VERILOG026: “logic” should be used instead of “reg” and “wire”
Summary
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| - | - | LOW | Consistency | Conventional | 5min | synthesis, vscode, simulation, lowrisc, linter, deprecated |
Description
Replace reg and wire with logic.
Noncompliant code example
reg abc; wire def;
Compliant solution
logic abc; logic def;
Articles & blog posts
- Verilog reg, Verilog wire, SystemVerilog logic. What’s the difference?
- lowRISC Verilog Coding Style Guide - Language Features - Preferred SystemVerilog Constructs
- The Art of Deprecation
logic should be used instead of reg and wire.
Parameters
No parameters.