VERILOG028: Each file should define one single design unit

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Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags
-	-	LOW	Adaptability | Modular	30min	synthesis, vscode, linter, lowrisc, simulation

Description

Articles & blog posts

• lowRISC Verilog Coding Style Guide - File Extensions

To simplify large project management, review and evolutions, there should not be more than one design unit declaration (module, package, interface, program, configuration or class) per file.

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