VERILOG2125: Blocking and non-blocking assignments should not be mixed in the same “always” block

Summary

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Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags
HIGH	-	-	Intentionality | Logical	20min	synthesis, vscode, simulation, linter

Description

Blocking and non-blocking assignments should not be mixed in the same always block.

Noncompliant code example

always @* begin
  y = 0;
  z <= 1;
end

Compliant solution

always @* begin
  y = 0;
  z = 1;
end

Articles & blog posts

• Nonblocking Assignments in Verilog Synthesis, Coding Styles That Kill! - SNUG-2000 - Clifford E. Cummings

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