VHDL029: ‘integer’, ‘natural’ and ‘positive’ declarations should have range constraint
Summary
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| LOW | - | - | Intentionality | Efficient | 10min | synthesis, vscode, linter, cnes, cnes-std-05900 |
Description
Noncompliant code example
signal s : integer; -- Noncompliant subtype st is natural; -- Noncompliant variable v : positive; -- Noncompliant generic ( a : integer; -- Noncompliant );
Compliant solution
signal s : integer range 0 to 3; subtype st is natural range 0 to 3; variable v : positive range 1 to 3; generic ( a : integer range 0 to 3; );
integer, natural and positive declarations should always be constrained by a
range to optimize synthesis.
Parameters
| Parameter | Value | Description |
|---|---|---|
| excludeGenerics | false | Set to 'true' to not apply this rule on generics, set to 'false' otherwise. |