VHDL126: Multiple declarations should not be written on the same line

Summary

Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags

-	-	LOW	Intentionality \| Clear	5min	synthesis, do254, vscode, simulation, linter, do254-dr4, cnes, cnes-std-01200, declaration

Multiple declarations on a single line are more difficult to read. This rule checks if there is more than one declaration per code line.

architecture a of e is
  constant const1, const2 : std_logic;
begin
end;

architecture a of e is
  constant const1 : std_logic;
  constant const2 : std_logic;
begin
end;

No parameters.