VHDL183: Non-synthesizable statements should not be used in design
Summary
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| - | - | HIGH | Intentionality | Logical | 30min | synthesis, vscode, linter, cnes, cnes-std-06700 |
Description
Non-synthesizable statements must not be used in synthesis files. Usage of the following statements is checked by this rule:
accessafterdisconnectfilewait
Exception
file used within function is allowed.
Noncompliant code example
process is begin z <= a nor b after 10 ns; -- Noncompliant: 'after' is a non-synthesizable statement end process;
Parameters
No parameters.