VHDL217: “case” statement should not have too many “when” clauses

Summary

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Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags
MEDIUM	-	MEDIUM	Adaptability | Focused	30min	synthesis, understandability, performance, vscode, simulation, linter

Description

case statement with too many when clauses may produce design with poor performance and/or hard to understand. Design should be rethought to split large case statements.

Related rules

• "case" statement should not have too many cases

Noncompliant code example

With maxNumberOfWhenClauses parameter set to 4:

architecture a of e is
begin
  process (data_in) is
  begin
    case data_in is
      when s1 =>
        data_out <= "000";
      when s2 =>
        data_out <= "010";
      when s3 =>
        data_out <= "100";
      when s4 =>
        data_out <= "110";
      when s5 => -- Noncompliant: 5 'when' clauses
        data_out <= "001";
    end case;
  end process;
end architecture;

Compliant solution

With maxNumberOfWhenClauses parameter set to 4:

architecture a of e is
begin
  process (data_in) is
  begin
    case data_in is
      when s1 =>
        data_out <= "000";
      when s2 =>
        data_out <= "010";
      when s3 =>
        data_out <= "100";
      when s4 =>
        data_out <= "110";
    end case;
  end process;
end architecture;

Parameters

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Parameter	Value	Description
maxNumberOfWhenClauses	16	Maximum allowed number of 'when' clauses.