VHDL301: Forbidden std_logic values should not be used

Summary

Count: 1

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Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags
HIGH	-	-	Intentionality | Logical	20min	synthesis, vscode, linter, beta

Description

The following std_logic values should not be used in synthesis:

• U: Unitialized
• X: Forcing Unknown
• W: Weak Unknown
• L: Weak 0
• H: Weak 1
• -: Don't care

Noncompliant code example

  i1 : in std_ulogic := 'U';

Parameters

No parameters.