VHDL315: Empty conditional branch should be implemented or removed
Summary
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| HIGH | - | - | Intentionality | Complete | 20min | synthesis, vscode, simulation, linter |
Description
Noncompliant code example
if reset = '1' then -- Noncompliant end if; for i in 0 to limit loop -- Noncompliant end loop;
Compliant solution
With custom forbidden attribute list: val
if reset = '1' then q <= '0'; end if; for i in 0 to limit loop v := v xor data(i); end loop;
An empty conditional branch is usually an indication that a feature has not been implemented yet.
Please review this code and either implement the missing functionality or remove the empty branch if it is no longer needed.
The following structures are checked for emptiness:
- Conditional
if,elsif, andelsestatements whenclauses incasestatementsfor,while, and infinite loopsif,elsif, andelsegeneratestatementswhenclauses incasegeneratestatementsforgeneratestatements
Parameters
No parameters.