277c7466-409a-41d8-a81e-d38caa5b8403

Summary

Count: 1

Clear filters

Rule	Message	Location	Effort	Reliability	Security	Maintainability
VHDL026	Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.	mlite_pack.vhd#197	20min	HIGH	-	-