b54c6d7f-a4e3-4c0c-b1db-16a04751e979

Summary

Count: 1

RuleMessageLocationEffortReliabilitySecurityMaintainability
VHDL026Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.mlite_pack.vhd#19320minHIGH--