c78d69ba-eef3-48e7-b404-b405f804a8ee

Summary

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Rule	Message	Location	Effort	Reliability	Security	Maintainability
VHDL026	Replace by one of the following allowed port types: std_logic, std_logic_vector, subtype of those types, record of those types or array of those types.	mlite_pack.vhd#177	20min	HIGH	-	-