VERILOG2005: An “inout” port that is never read should be converted into an “output” port

Summary

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Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags
MEDIUM	-	-	Intentionality | Logical	10min	synthesis, vscode, linter, simulation

Description

Noncompliant code example

module fly(inout x);
  assign x = 1;
endmodule

Compliant solution

module fly(output x);
  assign x = 1;
endmodule

An inout port that is never read should be converted into an output port.

Parameters

No parameters.