VERILOG2010: Unused implicitly created nets should be removed

Summary

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Reliability	Security	Maintainability	Code attribute	Effort to fix	Tags
HIGH	-	-	Intentionality | Logical	10min	synthesis, vscode, simulation, linter

Description

An implicitly created net is not referenced elsewhere in the design. This is often a typo in the name and not intentional.

Noncompliant code example

module fly(output x);
  assign x = 1;
endmodule

module top;
  logic typo;
  fly fly1(typa); // Noncompliant: 'typa' instead of 'typo'
endmodule

Compliant solution

module fly(output x);
  assign x = 1;
endmodule

module top;
  logic typo;
  fly fly1(typo);
endmodule

Parameters

No parameters.