VERILOG2114: “always_comb” or “always_ff” or “always_latch” should be used instead of “always”
Summary
| Reliability | Security | Maintainability | Code attribute | Effort to fix | Tags |
|---|---|---|---|---|---|
| - | - | MEDIUM | Consistency | Conventional | 10min | synthesis, vscode, lowrisc, simulation, linter, deprecated |
Description
SystemVerilog always_comb or always_ff or always_latch should be used instead
of Verilog always.
Noncompliant code example
module top;
logic a, b, c;
always @(*) begin
c = a + b;
end
endmodule
Compliant solution
module top;
logic a, b, c;
always_comb begin
c = a + b;
end
endmodule
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